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SI8904EDB 概述
Bi-Directional N-Channel 30-V (D-S) MOSFET 雙向N溝道30 V( D- S)的MOSFET
SI8904EDB 數(shù)據(jù)手冊
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PDF下載SPICE Device Model Si8904EDB
Vishay Siliconix
Bi-Directional N-Channel 30-V (D-S) MOSFET
CHARACTERISTICS
? N-Channel Vertical DMOS
? Macro Model (Subcircuit Model)
? Level 3 MOS
? Apply for both Linear and Switching Application
? Accurate over the ?55 to 125°C Temperature Range
? Model the Gate Charge, Transient, and Diode Reverse Recovery
Characteristics
DESCRIPTION
The attached spice model describes the typical electrical
characteristics of the n-channel vertical DMOS. The subcircuit
model is extracted and optimized over the ?55 to 125°C
temperature ranges under the pulsed 0-V to 5-V gate drive. The
saturated output impedance is best fit at the gate bias near the
threshold voltage.
A novel gate-to-drain feedback capacitance network is used to model
the gate charge characteristics while avoiding convergence difficulties
of the switched Cgd model. All model parameter values are optimized
to provide a best fit to the measured electrical data and are not
intended as an exact physical interpretation of the device.
SUBCIRCUIT MODEL SCHEMATIC
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate
data sheet of the same number for guaranteed specification limits.
www.vishay.com
Document Number: 72971
S-60075?Rev. B, 23-Jan-05
1
SPICE Device Model Si8904EDB
Vishay Siliconix
SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED)
Simulated
Data
Measured
Data
Parameter
Symbol
Test Condition
Unit
Static
Gate Threshold Voltage
On-State Drain Currenta
VGS(th)
ISS(on)
1.1
68
V
A
V
SS = VGS, ID = 250 μA
VSS = 5 V, VGS = 4.5 V
VGS = 4.5 V, ISS = 1 A
0.038
0.049
23
0.037
0.048
12
Drain-Source On-State Resistancea
RSS(on)
Gfs
?
V
GS = 2.5 V, ISS = 1 A
Forward Transconductancea
VSS = 10 V, ISS= 1 A
S
Dynamicb
Turn-On Delay Time
td(on)
tr
td(off)
tf
1.4
2.5
1.1
3.3
1.6
2
Rise Time
VSS = 10 V, RL = 10 ?
SS ? 1 A, VGEN = 4.5 V, RG = 6 ?
μs
I
Turn-Off Delay Time
Fall Time
1.5
3.7
Notes
a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2%.
b. Guaranteed by design, not subject to production testing.
www.vishay.com
Document Number: 72971
S-60075?Rev. B, 23-Jan-05
2
SPICE Device Model Si8904EDB
Vishay Siliconix
COMPARISON OF MODEL WITH MEASURED DATA (TJ=25°C UNLESS OTHERWISE NOTED)
www.vishay.com
Document Number: 72971
S-60075?Rev. B, 23-Jan-05
3
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